Fan-out

Technical Characteristics

Wafer-level Fan-out hybrid packaging technology, using TSV interposer, wafer RDL, chip-scale packaging technology and other packaging technologies mixed integration.

Technical Advantages

High packaging density,able to package chips with a large number of pins;

Capable of multi-chip heterogeneous integrated packaging, to improve the integration level;

Dew die packaging, good heat dissipation;

Using silicon substrates to effectively improve the moisture absorption problem of products and improve reliability;

Facilitates chip design and layout planning to reduce physical effects such as interference, power supply noise, and electromigration.

Package Structure