CIS Package System-Level Fan-out
Wafer Level WLCSPAutomotive-Grade CIS PackageSystem-Level Fan-out

System-Level Fan-out

Technical Characteristics

System-level Fan-out packaging integrates wafer-level packaging and chip-level packaging technology, packaging CIS on silicon substrates, and has the advantages of TSV, RDL, KBGA and other structures. Multi-chip heterogeneous integrated packaging is possible.

Package Structure

Wafer Size

  • 8
  • 12

Application

Used in automotive, industrial camera, machine vision and other fields.

  • Automotive

  • Industrial Camera

  • Machine Vision